Arithmetic processing circuitry for binary numbers typically employs floating point arithmetic in accordance with the IEEE 754 standard. Floating point arithmetic, used in addition, multiplication, and division, first normalizes the binary numbers to be added, multiplied, or divided by shifting the binary numbers until, for a positive number, the first non-zero digit (i.e., 1) is immediately to the left of the radix point such that the mantissa part of the binary numbers is greater than or equal to one and less than two. A negative binary number will have leading ones. Thus, to normalize a negative number, the number must be shifted so that the first zero is immediately to the left of the radix point.
For multiplication, the normalized binary numbers are then multiplied and their exponents added. For division, the normalized binary numbers are divided and their exponents subtracted. For addition and subtraction, the normalized numbers must be shifted (i.e., aligned) so that their exponents are equal, then the numbers are added or subtracted.
To normalize a binary number, the number of leading zeros (for a positive number) or leading ones (for a negative number) must be quickly determined so that the number of shifts of the binary number can be quickly performed for the next arithmetic operation. Ideally, the leading one count or leading zero count is performed in parallel with the arithmetic operation so that shifting can be performed immediately after the arithmetic operation.
What is needed is a very fast arithmetic processing circuit for generating a binary number, calculating the number of leading ones or zeroes in the number, and then shifting the number to produce a normalized binary result for a next floating point arithmetic operation.